[cvs-checkins] irda/rtl/verilog irda_crc32_rx.v irda_crc32.v ...

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	irda
Changes by:	gorban	01/08/23 17:02:45

Modified files:
	rtl/verilog    : irda_crc32_rx.v irda_crc32.v irda_crc_ccitt16.v 
	                 irda_crc_rx_ccitt16.v irda_data_ctrl.v 
	                 irda_fast_enable_gen.v irda_fir_4ppm_decoder.v 
	                 irda_fir_4ppm_encoder.v irda_fir_bit_sync.v 
	                 irda_fir_flag_det.v irda_fir_flag_gen.v 
	                 irda_fir_rx.v irda_fir_tx.v irda_interrupts.v 
	                 irda_master_register.v irda_mir_bit_destuffer.v 
	                 irda_mir_bit_stuffer.v irda_mir_break_det.v 
	                 irda_mir_data_ctrl.v irda_mir_decoder.v 
	                 irda_mir_encoder.v irda_mir_rx.v 
	                 irda_mir_st_det.v irda_mir_st_gen.v 
	                 irda_out_mux.v irda_sip_gen.v 
	                 irda_sir_decoder.v irda_sir_encoder.v 
	                 irda_wb_router.v 

Log message:
	Added include for defines in all files for bottom up work.

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