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[openrisc] OR1200 implementation of l.sb and l.sh
Hi!
I've been looking at the OR1200 rtl, and I've seen that when a l.sb insn, i.e,
l.sb 0(r4), r5 // EA <- 0 + r4
// (EA) <- r5[7:0]
or1200 writes a whole (re-ordinated) 32-bit word in cache. Thus, when you only
want to write the byte 3 of a particular word, you are also writing bytes 0,
1 and 2, so the rest of the bytes of the word are modified in cache, though
they mustn't.
Could you please clear up this point?
Thank you very much
Mar�a Bolado
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