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Re: [openrisc] OR1200 ASIC Success probabilities.
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] OR1200 ASIC Success probabilities.
From
: "Damjan Lampret" <
[email protected]
>
[openrisc] OR1200 ASIC Success probabilities.
From
: Christian Melki <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
Re: Re: [openrisc] patch approval ?
From
: "���" <
[email protected]
>
[openrisc] Re: Patch to simulator: "xterm" channels on linux
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] patch approval ?
From
: Marko Mlinar <
[email protected]
>
Re: [openrisc] patch approval ?
From
: Marko Mlinar <
[email protected]
>
RE: [openrisc] patch approval ?
From
: Chris <
[email protected]
>
RE: [openrisc] patch approval ?
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] patch approval ?
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] PIC documentation
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] PIC documentation
From
: "Robert Cragie" <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] or1ksim UART bug fix
From
: Marko Mlinar <
[email protected]
>
Re: [openrisc] or1ksim feature: tcp channels
From
: Marko Mlinar <
[email protected]
>
Re: [openrisc] patch approval ?
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] A question about Binutils for or1200!
From
: Marko Mlinar <
[email protected]
>
[openrisc] or1ksim feature: tcp channels
From
: "Scott Furman" <
[email protected]
>
[openrisc] or1ksim UART bug fix
From
: "Scott Furman" <
[email protected]
>
[openrisc] gdb fixes
From
: "Scott Furman" <
[email protected]
>
[openrisc] patch approval ?
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] PIC documentation
From
: "Scott Furman" <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
RE: [openrisc] PIC documentation
From
: "Scott Furman" <
[email protected]
>
Re: [openrisc] A question about Binutils for or1200!
From
: "Damjan Lampret" <
[email protected]
>
[openrisc] A question about Binutils for or1200!
From
: xu hu <
[email protected]
>
[openrisc] A question about Binutils for or1200!
From
: xu hu <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Boot sequence for OR1200
From
: "Damjan Lampret" <
[email protected]
>
[openrisc] Boot sequence for OR1200
From
: Ambarish Sule <
[email protected]
>
Re: [openrisc] PIC documentation
From
: Bryan Richter <
[email protected]
>
Re: [openrisc] PIC documentation
From
: Scott Furman <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] how to get start??
From
: Marko Mlinar <
[email protected]
>
RE: [openrisc] PIC documentation
From
: "Scott Furman" <
[email protected]
>
Re: [openrisc] PIC documentation
From
: "Damjan Lampret" <
[email protected]
>
[openrisc] how to get start??
From
:
[email protected]
Re: [openrisc] Cell not translated
From
: "LuoLei2000" <
[email protected]
>
Re: [openrisc] Cell not translated
From
: "LuoLei2000" <
[email protected]
>
Re: [openrisc] Cell not translated
From
: "lei luo" <
[email protected]
>
Re: [openrisc] Cell not translated
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Cell not translated
From
: Richard Herveille <
[email protected]
>
[openrisc] PIC documentation
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] Cell not translated
From
: "Jerry English" <
[email protected]
>
[openrisc] Cell not translated
From
:
[email protected]
[openrisc] Cell not translated
From
: "LuoLei2000" <
[email protected]
>
Re: [openrisc] Automake problem in or1ksim Installation
From
:
[email protected]
Re: [openrisc] Automake problem in or1ksim Installation
From
: Richard Prescott <
[email protected]
>
[openrisc] Automake problem in or1ksim Installation
From
: Ambarish Sule <
[email protected]
>
[openrisc] Wishbone Registered Inputs
From
:
[email protected]
Re: [openrisc] Running ORPsoc simulator
From
: Marko Mlinar <
[email protected]
>
RE: [openrisc] Running ORPsoc simulator
From
: "Robert Cragie" <
[email protected]
>
Re: [openrisc] regression
From
:
[email protected]
[openrisc] regression
From
: Damjan Lampret <
[email protected]
>
Re: [openrisc] ORP_SOC RTL Regression
From
:
[email protected]
Re: [openrisc] Running ORPsoc simulator
From
: "Simon Srot" <
[email protected]
>
Re: [openrisc] l.trap instruction argument ?
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Running ORPsoc simulator
From
: Marko Mlinar <
[email protected]
>
[openrisc] l.trap instruction argument ?
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] Running ORPsoc simulator
From
: "Scott Furman" <
[email protected]
>
RE: [openrisc] Running ORPsoc simulator
From
: "Robert Cragie" <
[email protected]
>
Re: [openrisc] UART Interrupts
From
: "Damjan Lampret" <
[email protected]
>
[openrisc] UART Interrupts
From
: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <
[email protected]
>
Re: [openrisc] Running ORPsoc simulator
From
: Marko Mlinar <
[email protected]
>
Re: [openrisc] Immediate value in l.nop instruction
From
: "Damjan Lampret" <
[email protected]
>
RE: [openrisc] Running ORPsoc simulator
From
: "Robert Cragie" <
[email protected]
>
Re: [openrisc] Immediate value in l.nop instruction
From
: Carlos S�nchez de La Lama <
[email protected]
>
Re: [openrisc] List of False Timing Paths for OR1200
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Immediate value in l.nop instruction
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Running ORPsoc simulator
From
: Marko Mlinar <
[email protected]
>
Re: [openrisc] Function prologue and stack frame
From
: Marko Mlinar <
[email protected]
>
[openrisc] List of False Timing Paths for OR1200
From
:
[email protected]
[openrisc] FW: Running ORPsoc simulator
From
: "Robert Cragie" <
[email protected]
>
[openrisc] Section attributes in gcc
From
: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <
[email protected]
>
[openrisc] Immediate value in l.nop instruction
From
: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <
[email protected]
>
[openrisc] Running ORPsoc simulator
From
: "Robert Cragie" <
[email protected]
>
Re: [openrisc] Function prologue and stack frame
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Function prologue and stack frame
From
: Marko Mlinar <
[email protected]
>
RE: Re: [openrisc] Function prologue and stack frame
From
: "Scott Furman" <
[email protected]
>
Re: [openrisc] Function prologue and stack frame
From
: "Scott Furman" <
[email protected]
>
Re: [openrisc] ORP_SOC RTL Regression
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Function prologue and stack frame
From
: sfurman@nospam_rosum.com
[openrisc] RISC I architecture
From
:
[email protected]
Re: [openrisc] ORP_SOC RTL Regression
From
:
[email protected]
Re: [openrisc] ORP_SOC RTL Regression
From
: "Damjan Lampret" <
[email protected]
>
[openrisc] ORP_SOC RTL Regression
From
:
[email protected]
Re: [openrisc] Interrupt servicing
From
: "Robert Cragie" <
[email protected]
>
Re: [openrisc] Problems building tools
From
: Marko Mlinar <
[email protected]
>
[openrisc] Problems building tools
From
: "Robert Cragie" <
[email protected]
>
[openrisc] wrong file format for gdb
From
:
[email protected]
Re: [openrisc] xori instruction
From
: "Damjan Lampret" <
[email protected]
>
Re: [openrisc] Cache invalidation & synchronization
From
: "Damjan Lampret" <
[email protected]
>
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